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Description: ARM+FPGA JTAG(二合一)原理图与PCB，DIY者的福音。protel格式。
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Size: 50954 |
Author: 王明 |
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Description: avr用的jtag的例子，有原理图和pcb-avr the JTAG example, a schematic and PCB
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Size: 497231 |
Author: ldqmoon |
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Description: 这个使用usb的avr jtag ice的例子,同样有sch和pcb-the use of the USB JTAG ice avr example, the same PCB and sch
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Size: 394670 |
Author: ldqmoon |
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Description: 可用于quantus下 FPGA jtag和AS下载的下载器PCB图
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Size: 30711 |
Author: hexd |
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Description: JTAG ICE Schematic and PCB View for ATmel Atmega Family.
evertool used ad firmware.
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Size: 93121 |
Author: mj tooba |
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Description: 44b0 的JTAG 电路PCB 还有使用文档-44b0 JTAG circuit PCB also use the file
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Size: 249532 |
Author: 许 |
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Description: avr的jtag调试下载线制作，有图片，原理图，pcb等。-avr download the JTAG Debugging production line, pictures, schematics, PCB, etc..
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Size: 509159 |
Author: find |
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Description: keil ulink的电路图和源代码,原装的要买上千哟-keil ulink the circuit diagram and source code, original to buy thousands of yo
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Size: 1826816 |
Author: 雨果 |
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Description: 关于自制C8051单片机编程器的文档，对至关重要的操作相关文件，以及部分源代码，都公开。-On the self-C8051 Microcontroller Programmer
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Size: 1709056 |
Author: 孙悟空 |
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Description: S3C6410电路开发的中文版，网上找到的，结构清楚，翻译简洁明了，做硬件设计必看内容-S3C6410 Circuit developed the Chinese version of the Internet to find the structure clear, concise translations, so the hardware design of a must-see content
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Size: 36864 |
Author: 周吉鹏 |
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Description: 我画的TI公司TMS320F2802X的最小系统版电路图，dxp的，有原理图和pcb，库文件也包括进来了。带JTAG接口。-I am painting the TI minimum system version of the company TMS320F2802X circuit, dxp, there are schematic and pcb, library files also entered. With a JTAG interface.
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Size: 266240 |
Author: 陈石军 |
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Description: TI DSP仿真器XDS510 USB2.0 驱动-TI DSP Emulator XDS510 USB2.0 drive
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Size: 5854208 |
Author: 龙景焱 |
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Description: Introduction
dePCB.org project aims at helping people reverse engineer unknown electronic equipment faster and more easily.
We plan to provide a collaborative platform where people can identify components, IC, annotate parts of a PCB and discuss a probable use or receive suggestions about further enquiry (JTAG, UART serial, glitching, ...).
Use case #1
Upload image to depcb.org
OCR the image to retrieve any text (and display it on the web page, next to the image)
Position on the image where each text portion was recognized
Query an IC DB to fetch IC function / characteristics.
-Introduction
dePCB.org project aims at helping people reverse engineer unknown electronic equipment faster and more easily.
We plan to provide a collaborative platform where people can identify components, IC, annotate parts of a PCB and discuss a probable use or receive suggestions about further enquiry (JTAG, UART serial, glitching, ...).
Use case #1
Upload image to depcb.org
OCR the image to retrieve any text (and display it on the web page, next to the image)
Position on the image where each text portion was recognized
Query an IC DB to fetch IC function / characteristics.
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Size: 10240 |
Author: jhi |
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Description: ulink2 jtag programer (schematic + pcb + hex files)
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Size: 156672 |
Author: murat |
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Description: JTAG(Joint Test Action Group，联合测试行动小组)是1985年制定的检测PCB和IC芯片的一个标准，1990年被修改后成为IEEE的一个标准，即IEEE1149.1-1990。IEEE 1149.1标准就是由JTAG这个组织最初提出的，最终由IEEE批准并且标准化的。所以，这个IEEE 1149.1这个标准一般也俗称JTAG调试标准。
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Size: 187392 |
Author: cdm |
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Description: 本PCB文件，是使用Altium designer设计的，是最小系统版，下载支持JTAG和SWD等方式，没有板载外设，仅将所有IO都引出来，非常适合电子设计竞赛和项目应用。-The PCB document is designed to use Altium designer, is the smallest system, download supports JTAG and SWD, etc., there is no on-board peripherals, only the lead out all IO are ideal for electronic design contest and project applications.
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Size: 4354048 |
Author: 陈震东 |
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Description: 一步 _配置下载xilinx_FPGA_JTAG
FPGA 下载模式说明
S1 是下载模式跳线，M0，M1，M2 默认情况下是通过 4.7K 的电阻上拉 3.3V 电源的。
当用跳线帽将 S1 的 PIN1 和 PIN2 短接时 M0=0，同样的方法将短接 PIN3 和 PIN4，PIN5
和 PIN6 可使得 M1，M2 等于 0。M0、M1、M2 的电平状态与下载模式之间的关系参见下
表。Boundary Can Mode 是调试常用的 JTAG 模式。使用板载的 PROM 时，使用的模式
是 Master Serial Mode。
注：S1的引脚原理图和PCB 有点不同本说明文档的引脚数目指的是PCB 上的。
-Step by step _ xilinx_FPGA_JTAG FPGA configuration download Download Mode Description S1 is download mode jumper, M0, M1, M2 by default 4.7K pull-up resistor 3.3V power supply. When the jumper cap onto the PIN1 and PIN2 S1 short M0 = 0, the same method will be short PIN3 and PIN4, PIN5 and PIN6 can make M1, M2 is equal to 0. Relationship M0, M1, M2 level between the state and the download mode see table below. Boundary Can Mode is commonly used JTAG debug mode. When using the onboard PROM, mode using Master Serial Mode. Note: The number of S1 pin schematic and PCB bit different this documentation refers to a pin on the PCB.
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Size: 2136064 |
Author: 郭志 |
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Description: 传统20脚JTAG底座个头大，占用PCB面积多，连接线复杂。基于STM32F103C8T的SW模式Jlink，只需要三根线即可与目标板实现通讯，可实现程序下载，单步调试等功能，除了不能检测目标板电压、不能给目标板供电、速度有所降低之外，与完整版JLink的功能是一样的。当然，成本也可以降低很多(The traditional 20 foot JTAG base is large, occupies more PCB area, and has complex connection line. Jlink SW model based on STM32F103C8T requires only three wires and the target board to achieve communication, can realize the program download, step debugging and other functions, but can not detect the target board voltage, can not be to the target board, power supply, speed is reduced, and the full version of JLink function is the same. Of course, the cost can be reduced a lot)
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Size: 912384 |
Author: banniantao
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